Probabilistic Boolean Logic

In this paper, we introduce and define Probabilistic Boolean Logic, whose logical operators are “correct” with a probability 0 < p ≤ 1. Analogous to conventional Boolean logic, we define well-formed probabilistic Boolean formulae (pbf). Every pbf is associated with two attributes, the underlying Boolean function it computes, and a for a specific input, the probability that this boolean function is computed correctly. To characterize these attributes simultaneously, we introduce the concept of a sample space generator associated with any pbf. For a specific input, a sample space generator of a pbf generates a sample space, which defines the random experiment which determines the value of the pbf. Using the notion of sample space generators, we define equivalence of two pbf, derive identities and properties. Based on properties of sample space generators, we prove that for any probabilistic boolean function, there is a probabilistic boolean formula which computes it and vice versa. We introduce and relate probabilistic boolean circuits to classical models of computation, such as randomized circuits and probabilistic automata. Synthesis and optimization of probabilistic boolean circuits from specifications (in the form of probabilistic boolean functions) has implications to circuit design with unreliable logic gates. It has been experimentally demonstrated earlier that such circuits which utilize unreliable logic gates, can dramatically reduce energy consumption of certain applications and are vital towards sustaining Moore’s law into the next decades. Extending this, we derive a theoretical result to prove that in the domain of cmos, transition functions of probabilistic automata maybe realized with lesser energy complexity by probabilistic circuits when compared to randomized circuits of identical size and depth.